Workshop on Mastering VLSI RTL Design

Unveiling FPGA Strategies for Advanced Defence and Space Radios


Join us for an illuminating workshop on "Mastering VLSI RTL Design: Unveiling FPGA Strategies for Advanced Defence Radios," where we delve into the intricacies of leveraging FPGA (Field-Programmable Gate Array) technology to enhance the capabilities of defence radio systems. In today's rapidly evolving defence landscape, the need for agile and adaptable radio systems is more pressing than ever. FPGAs offer unparalleled flexibility and configurability, making them indispensable components in the development of advanced defence communication solutions. This workshop will provide participants with a comprehensive understanding of RTL (Register-Transfer Level) design techniques tailored specifically for defence and space applications. Through a series of demo and expert-led discussions, attendees will explore the strategic deployment of FPGAs to optimize radio functionalities, enhance signal processing capabilities, and streamline system performance. Led by industry-leading experts with extensive experience in RTL design and FPGA implementation, this workshop promises to be an invaluable learning opportunity for professionals involved in defence technology development. Participants will gain practical insights into FPGA strategies, best practices for RTL design, and real-world case studies highlighting successful implementations in defence radio systems. Whether you're a seasoned engineer looking to deepen your expertise or a newcomer eager to explore the possibilities of FPGA technology in defence applications, this workshop offers something for everyone. Join us as we unlock the potential of FPGA strategies for mastering RTL design in advanced defence radios.

Speaker details

1. Hariprasad Bhat (Lekha Wireless)
2. Jayesh Tanwani (Intel)

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